Beige Bag Software

Logical Expressions - Bilateral Diode Clamp

About the writer: Harvey Morehouse is a contractor/consultant with many years of experience using circuit analysis programs. His primary activities are in Reliability, Safety, Testability and Circuit Analysis. He may be reached at harvey.annie@verizon.net. Simple questions for which I know the answer are free. Complex questions, especially where I am ignorant of the answers, are costly!!!

Summary: In previous articles of this series I showed how to create logical expressions and implement ideal and perfect diode models. These models do not fully work in all cases when two such diodes are connected essentially in parallel or in anti-parallel. I have decided to prepare an implementation of an anti-parallel diode pair suitable for use as a bilateral clamp circuit. This is a natural extension of the work in the previous articles. The model is semi-ideal in that it incorporates a forward diode drop (which could be zero), but there is no breakdown voltage for these diodes.

Bilateral Diode Clamp:

A diode clamp circuit consists of two anti-parallel diodes, with one diode anode connected to the other diode cathode. Normally in this configuration this is the point at which the signal will be limited in its positive and negative excursions. At the 'dangling' cathode the negative limit level will be connected, and at the 'dangling' cathode the positive limit level will be presented. The signal at the diode junction will then be limited to no more than VF volts more positive, or -VF volts less negative than the respective clamp levels.

The respective diode currents will be limited by whatever impedance is presented at the respective clamp level and by that of the signal being clamped.

Why would one wish to create such a circuit? Often when one uses a behavioral model for a device (particularly IC realizations) or when one creates such a model, the linear range of the device is unlimited. But in the 'real' circuit the voltage excursions cannot exceed the power supply 'rails'. Now 'real' diode devices may be used in these models, however modifying a diode to produce one with a very small voltage drop is problematic, and it also leaves one with a realization which has many other associated elements and parasites to consider.

If the clamp level is unilateral, that is to say there is but one clamp level, the previously ideal diode or perfect model will work nicely. But these models do not work well in a bilateral clamp configuration (nor in a bridge configuration as well. It is to create a behavioral model, suitable for use with other behavioral elements to create circuits that will simulate rapidly, that this device is intended.

Clamp Circuit Model:

A test circuit illustrating this is shown in Figure 1 following.

Figure 1
Bilateral Clamp Test Circuit

One of the diodes (D1) is represented by nonlinear source B1 and resistor R1, and the second diode (D2) by nonlinear source B2 and resistor R2. The topology of the clamp circuit is shown below the main circuit. Voltage source B1 and resistor R1 represent equivalent diode D1, while source B2 and R2 represent equivalent diode D2.

Before attempting to add the equations for B1 and B2 it is useful to first evaluate the possible conditions for the conduction and non-condition for diodes D1 and D2. To make the model most useful all possible conditions will be explored. Note: Despite the sense of B2 being the same as B1, its underlying equations will make its equivalent diode inversely connected to that of B1.

In the most general case, voltages V1 and V2 could be such as to cause both diodes to conduct at the same time. Moreover, conduction of D1 would NOT preclude D2 conduction, the converse also being true. While diodes D1 and D2 would not normally simultaneously conduct, there is nothing to prevent this in usage of this new device.

Using a similar 'IF THEN ELSE' construct for the generators B1 and B2, as used for the half wave diode bridge implementation, with conduction being the default condition, the logical voltage expression for source B1 becomes:

In the syntax of available B2SPICE (SPICE3) logical expression capabilities, the equation for D1 becomes:

The logical expression for diode D2 is a little trickier, because the diode D2 conducts when v(n3) is less than v(n2) by VF volts. The conduction condition is (v(n3) - VF)< v(n2).

For diode D2, the logical function to be implemented is:

In the syntax of available B2SPICE (SPICE3) logical expression capabilities, the equation for D2 becomes:

Placing these expressions into the circuit of Figure 1, it becomes as shown in Figure 2 following (with the removal of the diodes shown as D1 and D2).

Clamp Diode Test1 Circuit
Figure 2

The netlist for this circuit is:

There are no real surprises in the graph of the circuit, shown in Figure 3 following:

Diode Clamp Test1 graph
Figure 3

The sinusoidal source v3 is clamped at N3 to a level between -6 and +6 volts. VF was set a 1v for this test. If VF were set to 0v, the clamp voltage would be almost exactly plus and minus 5v, with the small error of a 1milli ohm resistance.

It is expected that the model of the clamp circuit will be added to the B2SPICE library as a circuit element.

Conclusions:

Using the B2SPICE (or any other full SPICE3 implementation) capabilities of creating logical functions, a nearly perfect clamp circuit may me modeled.