Logical Expressions - NO Smooth Switches and a Current Limited Voltage source
About the writer: Harvey Morehouse is a contractor/consultant with many years of experience using circuit analysis programs. His primary activities are in Reliability, Safety, Testability and Circuit Analysis. He may be reached at email@example.com. Simple questions for which I know the answer are free. Complex questions, especially where I am ignorant of the answers, are costly!!!
Summary: In this article I describe now to make a smooth switch model, Smooth Transition Switch Type 1 (STSNOT1). Also included is a means for producing a simple current limited voltage source.
Often one wishes to model a transistor using a switch model to represent it, either to simplify the analysis and/or when the switching device characteristics are not well known and its performance is nonetheless very rapid, especially compared the time constants of the rest of the circuit. Even when modeling a real switch, but the switch characteristics are not well known with regards to switch bounce, arcing and other characteristics of the real switch, and/or these characteristics are not important to the simulation, a fast simulating model is desired.
When a typical switch model provided as a default with many SPICE products opens or closes, it represents an impedance which virtually instantaneously changes from a very low to a very large impedance. This often creates convergence problems for many simulations. This occurs because the SPICE engine often is running at large step intervals just before the switch activation, and it tries to step over the switch event. So at best, it gears back down to a very small step interval. Worse, occasionally it finds a stable solution at the large step interval, and creates an erroneous solution.
What is desired is a switch that will change between an 'off' or 'open' high resistance state to an 'open' or 'on' resistance state in a smooth manner. In one sense it is still discontinuous, as it's state does change abruptly, however, its impedance about the switching interval changes in a very small amount, and also for small changes within the switching interval.
One of the simplest smooth switch models which smoothly switches is shown in Figure 1 following:
STSNOT1 switch model
This model is very simple. A control voltage is applied between N3 and N4 terminals, and the switch contacts are represented by the circuitry between nodes N3 and N4. Generator B1 applies a current between nodes N1 and N2 which is dependent on the voltage between nodes N3 and N4. Specifically, for the B1 source, its current value is set as :
i = u(v(n3,n4)-.1)*v(n1,n2)
This means, that IF the control voltage is GREATER than 0.1 volts, the switch point, the current through the switch (neglecting the contribution of the 'OFF' resistance R2) will be equal to the voltage across the switch control terminals. This presents a resistance which is equal to 1/(v(n3,n4) - in parallel of course with R2, and it varies from 1e6 ohms to about 1/max(v(n3,n4).
Consequently, with the control voltage very slightly below 0.1V, the switch current is v(n1,n2)/R2. With v(n3,n4) very slightly in excess of 0.1 volts, the additional current is very slightly more than v(n1,n2)/R2. With increasing v(n3,n4) the switch current becomes greater until v(n3,n4) and v(n1,n2) reach stable points (the external circuit permitting, of course) when it presents a current of v(n1,n2)/Vmax(v(n3,n4)-0.1). Thus if v(n3,n4) reaches 10 volts, then its final resistance value becomes approximately 1/10 ohms. A test model of this circuit is shown in Figure 2 following:
STSNOT1 test circuit #1
The test circuit is quite straightforward. V1 is a pulsed 5V source, 50% duty cycle, with a 1p sec rise and fall time and a period of 0.02u sec. This voltage is integrated by R5 and C1 to form a smooth ramp. Now this is not realistic to drive a 'real' mechanical switch or even to simulate most transistors, but it illustrates the action of the switch, which is shown in Figures 3 and 4 following:
STSNOT1 test circuit fall time graph
STSNOT1 test circuit rise time graph
Suppose however the control signal is a circuit with a final level of 1 volt, and one wishes a final switch on resistance of 125m ohms? In that case, solve the following equation:
1/k*(max(v(n3,n4)-von) = Ron
Using Ron = .125, von = .1, max(v(n3,n4)) = 1, one arrives at the relation that:
1/k*.9 = 0.125
Solving for k:
k = 1/0.125*.9 = 8.88889
1/8.888889*.9 = 1/8 = .125 ohms
In this case then one can edit the model to multiply the B1 source to multiply the uramp function by 8.888889.
I considered making a parameterized subcircuit model for this device, and including an RC network into the model, but it is such a simple device, that if one needs a source with a specific rise time control signal one can externally add it as needed. And, as most of my logical device digital models where I would use generally such switches have R-C networks at the output, these could be modified if required to tailor the switch characteristics as required. Thus, only a subcircuit model for this device was created.
However, the switch itself needs some more testing. The most important case (for me) is where the switch is driving a capacitive load, and where the load capacitance behaves as an infinite capacitor over a range. This is the case for a diode, where it takes time to switch the diode from a conducting state to a non-conducting state. During the reverse recovery time it presents an essentially constant 'ON' voltage until the excess charges are swept out of the device. This application is best illustrated in the case of a simple model of a BUCK converter. A test circuit is shown in Figure 5 following:
STSNOT1 test2 circuit 1
In this circuit the switch represents a switching transistor in a BUCK converter model. The BUCK converter itself is shown as open loop, to simplify the test circuit. In this circuit, the switch is not the STSNOT1 model, but is the standard 'instantaneous' switch device provided in the standard library. A small portion of the output is shown in Figure 6 following:
STSNOT1 test2 circuit1 graph
This shows the problem in using a non-smooth switch, as the V2 currents (pink trace) show large spikes when the switch is turned on.
Now as a first pass, one could attempt to use a current limited source, as the spikes of 30A are clearly not right. Of course one could just ignore them, but that is cheating. Let us add a simple current limiter. This is shown in Figure 7 following, with the addition of a diode and a current source connected as shown.
STSNOT1 test 3 Circuit
The operation of the current limiter, composed of current source I1 and ideal diode U1, is straightforward. I1 biases the diode on with a current of 3A in this case. V2 can provide current ( which flows through diode U1) until the net current of diode reaches 3A, in which case the diode then becomes reverse biased, and no greater current will flow. One can test this circuit separately, and see that it does work in simple cases. Let us see if this will limit the spike of current, or at least limit them, through v1, S1 and D1. A test graph of this circuit is shown in Figure 8 following:
STSNOT1 test 3 Circuit graph
In this case the v2 current still spikes at about 30A, even with the current limiting using an ideal diode. As a test, a second ideal diode will be used to replace diode D1. This model will switch faster than any 'real' diode device, so it will be interesting to see what happens. This is left as an exercise for the reader, but to give away the plot, there is no difference.
We are running into the time limits, the minimum times that the circuit will resolve, as well as into problems with the behavioral models. (Under SIMULATIONS, SETUP, set the maximum step size to 1u. This helps convergence.) With such ideal elements there is just no way that a solution can be found that is ideal under the conditions of using a switch that transitions in about zero time.
Note also that the open loop circuit is quite under-damped, depending of course on the size of the load resistor. The circuit consisting of the inductor, output capacitor and ESR of the capacitor tends to be fairly high 'Q', with the load resistor and ESR resistance providing damping. Thus, because of the ringing, some rather strange effects can occur depending on the values chosen. This is however extraneous to this paper, as the purpose here is to insure the switch model may be used effectively.
Now, however, using the same circuit but with the smooth transition switch device and the ideal diode D1, we arrive at the circuit in Figure 9.
STSNOT1 test 3 Circuit
In this circuit the smooth transition switch, which has been turned into a device (ST1), is used. A graph of the circuit output is shown in Figure 10 following.
STSNOT1 test 3 Circuit graph 1
Here we can see that the large current spikes have been minimized. In truth, there will and should be some current spikes with a real converter, unless of course one is using a similar circuit in a critical conduction mode or discontinuous conduction mode.. That is to say, if the switch drive and load are such that the conduction time/duty cycle of the switch is small and the current through the inductor and the flywheel diode drops to zero during the switch 'OFF' time, the turn-on current spiking will be minimal.
Another expanded view of a portion of the same graph is shown in Figure 11 following:
STSNOT1 test 3 Circuit graph 2
Here we can see that the diode turns off in about 6 ns. Notice that it is conducting (the voltage v(n2) is slightly negative before the transition. From Figure 10 we can see that voltage at v(n2) is about 10 volts, hence it is off when the source v2 is charging the inductor.
Now it is interesting to investigate to see the effects of the control voltage rise times on the current spike. Using the same circuit as in Figure 10, but with rise and fall times of 2us, and a dwell of 0.5us, we get the graph as shown in Figure 12 following:
STSNOT1 test 3 Circuit graph 2
Here we see that the current spike is reduced somewhat. The inductor current waveforms have changed slightly as have the other waveforms, not to mention the dynamic behavior of source B1 (within the switch model) due to the slight waveform difference.
As can be seen, the waveforms of switch current are not as nice and well behaved as we might like, however, if the design is appropriately performed, just as with a transistor, in a feedback configuration, the variances of the switch or transistor are made of no great effect. In this case, if the switch or transistor time constants are reasonably small compared to the rest of the circuit, their effects will not be great.
As you will see if you make the models and perform the simulations, they take a long time to simulate. And however much time it takes for the open loop buck converter we have used here to simulate, addition of a controller chip with a modulator, error amplifier, comparator and other circuitry could add considerably to the simulation time.
This device is very useful for most simulations; however, it does have its limitations. It would be nice if we had a switch which would vary in a logarithmic manner between off and on states. It would be nice if we had more control over the switch state behavior rather than relying on the external drive. Other switch models are possible which are more flexible and present better behavior for other situations, and may be presented later. However, it is always possible to edit the switch model in a given simulation to modify its characteristics.
A smooth switch model was created which can be used in simulations in place of transistors or abruptly varying switches to ease simulation times and aid in circuit convergence. The use of this model within a primitive Buck switching circuit is shown. A means of providing simple current limiting to a power supply level is also provided.
Smooth switch models of this type have been around for ages.
1: PCBCafe.com Online Book. http://www10.pcbcafe.com/book/parse_book.php?article=SMPS%2F%!intro.htm
2. Charles Hymowitz Generic switch model. http://www.edn.com/contents/images/DI1149.txt