Variable Capacitor #2
About the writer: Harvey Morehouse is a contractor/consultant with many years of experience using circuit analysis programs. His primary activities are in Reliability, Safety, Testability and Circuit Analysis. He may be reached at firstname.lastname@example.org. Simple questions for which I know the answer are free. Complex questions, especially where I am ignorant of the answers, are costly!!!
Summary: In previous article I showed how to create a voltage-variable capacitor (VVC). I had a need of a voltage variable capacitor for use in an averaged Current Mode SMPS device model. The circuit used a VVC, but did not do so correctly.
This article extends the analysis with more testing and prepared a circuit in B2SPICE version 5 format.
Voltage variable capacitor:
It would seem trivial to create a voltage-variable capacitor. One could just pass parameter variables to a capacitor's capacitance. Simple or is it?
If one does this, one creates a model which will exhibit steps in voltage across the capacitor if the capacitor value is changed. This is neither desired nor correct. This occurs due the model error, as a result of misusing/misapplying the fundamental capacitor equations.
The defining equation for a capacitor is:
I(t) = C(v2(t)) * dv/dt
Clearly, the capacitance is a variable, a function of the controlling voltage. The other 'v' in dv/dt refers to the voltage applied to the capacitor. To keep them separate, we designate the controlling voltage as v2(t). Solving for dv/dt,
dv/dt = i(t)/C(v2(t))
Integrating both sides results in:
v = integral [i(t)/C(v2(t))]
The circuit in question solved (incorrectly) for the equation:
v = integral [i(t)]/C(v2(t))
In part, for this reason, the circuit would not converge well in a transient analysis where mode switching occurred, and even where it might, the results could be in error. This solution would in effect cause discontinuous jumps in capacitor current when the value
The circuit would simulate correctly in an AC swept frequency mode, however, as we know, SPICE performs an AC analysis by first obtaining a DC operating point. This is done by opening all capacitors, shorting all inductors and obtaining a DC operating point. Next, the circuit is linearized about that operating point.
Now the value of the resonating capacitor used to create the effects of sampled data gain peaking is of course determined by equations, used to drive a voltage or current source dependent on the modeling, and thus is determined even in a DC operating point solution. However, the value of capacitance is determined by equations, and the solution will be determined by the circuit being in CCM or DCM.
This value will either be negligibly small, or of a calculated magnitude to illustrate the effects of sampling at a rate exceeding twice the twice the switching frequency. This subject and SMPS modeling are not germane to this article, except to illustrate that there is a practical application for such a model.
Now the whole nature of these phantom effects, right-hand half-plane zeros and poles is fairly well described in the literature BUT for one detail. Consider a capacitor which suddenly appears due to CM CCM mode operation, acquires a charge, and then disappears when the CCM mode is exited. Where did the charge go?
It is assumed herein, from an engineering and a circuit viewpoint, that the VVC modeling of such a device will, conserving charge, properly or at least sufficiently accurately allow a CCM model to be prepared usable in AC and DC simulations. That is the ultimate end of the work shown here.
The previous voltage variable capacitor paper showed a model embedded in a test circuit. A similar circuit is shown in Figure 1 following:
Voltage variable capacitor test circuit
A perhaps unfamiliar block in the model is the continuous filtering function. This block is used as a Laplace function integrator. Its transfer function is '1/s', where 's' is the Laplace operator. The control voltage is a pulse train with amplitude of 1V.
ID1 is an ideal diode device used to present a pulsating DC voltage to the load.
The B2 generator uses the equation:
v = I(Vam1) / (1e-12+v(n1,n2)*1e-6)
Whereas the B1 generator uses:
The B2 equation has two denominator values, one the capacitance when the v(n1,n2) value is (assumed one) of 1uF, and otherwise when v(n1,n2) is null of 1uuF. These values could be changed as required or passed as parameters. Or, one could make the control voltage variable, or alter the denominator equation to suit some need.
Voltage variable capacitor test circuit
In Figure 2 can be seen the effects of the capacitor switching. The Am1 current is small when the capacitance is 1p, and changes to an RC change and discharge current when the input causes it to appear as 1uF. Am2 shows the resistor current is added to the capacitor current. During the time when the capacitor is at 1uF, the RC smoothing may be seen.
variable capacitor model has been created. The purpose of so doing was
to create a replacement, conservative, capacitor model for use in a
SMPS CM averaged converter model.