Variable Inductor

About the writer: Harvey Morehouse is a contractor/consultant with many years of experience using circuit analysis programs. His primary activities are in Reliability, Safety, Testability and Circuit Analysis. He may be reached at harvey.annie@verizon.net. Simple questions for which I know the answer are free. Complex questions, especially where I am ignorant of the answers, are costly!!!

Summary: In previous articles I showed how to create a variable transformer, as well as a variable resistor, and a variable inductor. This article will show how to create a voltage-variable inductor.

Voltage variable inductor:

It would seem trivial to create a voltage-variable inductor. One could just pass parameter variables to an inductor's inductance. However, just as in the case of the variable capacitor, one must first look to the defining equations for an inductor.

We can divide both sides by L(vc(t)) resulting in only in a current dependent derivative on the right hand side. Then, interchanging left and right hand sides of the equality and integrating both sides, we get the result:

This is similar to the result we had for the capacitor. In this case the current will not abruptly change through the inductor, whereas for the capacitor, the voltage will not abruptly change.

Clearly, the inductance is a variable, a function of the controlling voltage, which is itself a function of time.

Let the value of the capacitance L(vL(t)) be L0 + vc(t)* L0, where Lo is the value of the inductance with vL (t) = 0. It is convenient to nominally define the control voltage limits to between zero and one volts. This would however limit the inductance variation to 2 * Lo. One could allow va(t) to vary greater than 1 volt. We can get a little more flexibility by introducing another variable, k. The defining equation for L(vc(t)) becomes:

'k' could of course be fractional. Suppose the maximum vc(t) were 5V, however, if it were desired to make the maximum inductance be perhaps 3.5 times the zero voltage value, k would be set to a value equal to 3.5/5 or 0.7.

Were vc to have a maximum voltage of perhaps 5V, and the desired inductance at that level to be perhaps 1/50 * L0, then 1 + k*vc(t) minimum would be equal to 1 + k * 5 = 1/50. Solving this for k produces a value of -0.196. Now of course we could accomplish the same thing by letting in this case vc vary from zero to -5V, in which case k would equal +0.196.

Modeling:

A voltage variable inductor model embedded in a test circuit is shown in Figure 1 following:

Figure 1
Voltage variable inductor test circuit

A netlist for this circuit is:

A perhaps unfamiliar block in the model is the continuous filtering function, cffm. This device is found under the sources category, for some strange reason. This block is used as a LaPlace function integrator. Its transfer function is '1/s', where 's' is the Laplace operator. The control voltage is a pulse with amplitude of 2V, starting at 5 mS and lasting for 100 mS.

A graph of the output with the values of 'Lo' to be simulated as 1Hy, k =1, vc a 1V, 1mS delayed step of 10V DC in series with a resistance of 1K applied to the 'inductor', is shown in Figure 2.

Figure 2
Voltage variable capacitor test circuit

The 'red' trace is the 'reference' inductor. The inductor voltage test circuit 'blue' trace and the reference circuit trace of inductor voltage coincide until 1 mS, when the test inductor value changes for the duration of the trace. The output trace shows no abrupt jumps, as should be the case.

It is left as an exercise for the reader to create a parameterized subcircuit model for this device as well as an appropriate symbol, passing it values for Lo and k.

Summary:

A voltage variable capacitor model has been created. Note that the inductance is a function of time, and NOT inductor current. A model of an inductor whose inductance is a function of current (flux) is more complex, and has been presented in another article.